diff --git a/src/3rdparty/chromium/v8/src/baseline/ia32/baseline-assembler-ia32-inl.h b/src/3rdparty/chromium/v8/src/baseline/ia32/baseline-assembler-ia32-inl.h
index e8dcaa1e0..60b1ead78 100644
--- a/src/3rdparty/chromium/v8/src/baseline/ia32/baseline-assembler-ia32-inl.h
+++ b/src/3rdparty/chromium/v8/src/baseline/ia32/baseline-assembler-ia32-inl.h
@@ -535,7 +535,11 @@ void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
   // If actual is bigger than formal, then we should use it to free up the stack
   // arguments.
   __ masm()->cmp(params_size, actual_params_size);
-  __ masm()->cmov(kLessThan, params_size, actual_params_size);
+  //__ masm()->cmov(kLessThan, params_size, actual_params_size);
+  Label ge;
+  __ masm()->j(kGreaterThanEqual, &ge);
+  __ masm()->mov(params_size, actual_params_size);
+  __ masm()->bind(&ge);
 
   // Leave the frame (also dropping the register file).
   __ masm()->LeaveFrame(StackFrame::BASELINE);
diff --git a/src/3rdparty/chromium/v8/src/builtins/ia32/builtins-ia32.cc b/src/3rdparty/chromium/v8/src/builtins/ia32/builtins-ia32.cc
index 3435f122c..a9009ecd5 100644
--- a/src/3rdparty/chromium/v8/src/builtins/ia32/builtins-ia32.cc
+++ b/src/3rdparty/chromium/v8/src/builtins/ia32/builtins-ia32.cc
@@ -753,7 +753,11 @@ static void LeaveInterpreterFrame(MacroAssembler* masm, Register scratch1,
   // If actual is bigger than formal, then we should use it to free up the stack
   // arguments.
   __ cmp(params_size, actual_params_size);
-  __ cmov(kLessThan, params_size, actual_params_size);
+  //__ cmov(kLessThan, params_size, actual_params_size);
+  Label ge;
+  __ j(kGreaterThanEqual, &ge, Label::kNear);
+  __ mov(params_size, actual_params_size);
+  __ bind(&ge);
 
   // Leave the frame (also dropping the register file).
   __ leave();
@@ -4420,7 +4424,11 @@ void Builtins::Generate_DoubleToI(MacroAssembler* masm) {
     __ shrd_cl(scratch1, result_reg);
     __ shr_cl(result_reg);
     __ test(ecx, Immediate(32));
-    __ cmov(not_equal, scratch1, result_reg);
+    //__ cmov(not_equal, scratch1, result_reg);
+    Label noteq;
+    __ j(equal, &noteq, Label::kNear);
+    __ mov(scratch1, result_reg);
+    __ bind(&noteq);
   }
 
   // If the double was negative, negate the integer result.
@@ -4428,7 +4436,9 @@ void Builtins::Generate_DoubleToI(MacroAssembler* masm) {
   __ mov(result_reg, scratch1);
   __ neg(result_reg);
   __ cmp(exponent_operand, Immediate(0));
-  __ cmov(greater, result_reg, scratch1);
+  //__ cmov(greater, result_reg, scratch1);
+  __ j(less_equal, &done, Label::kNear);
+  __ mov(result_reg, scratch1);
 
   // Restore registers
   __ bind(&done);
diff --git a/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.cc b/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.cc
index f012c046e..b20b765f7 100644
--- a/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.cc
+++ b/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.cc
@@ -124,8 +124,10 @@ bool CpuFeatures::SupportsWasmSimd128() {
 
 void CpuFeatures::ProbeImpl(bool cross_compile) {
   base::CPU cpu;
+#if defined(FORCE_USE_SSE2)
   CHECK(cpu.has_sse2());  // SSE2 support is mandatory.
   CHECK(cpu.has_cmov());  // CMOV support is mandatory.
+#endif
 
   // Only use statically determined features for cross compile (snapshot).
   if (cross_compile) return;
@@ -684,6 +686,7 @@ void Assembler::movzx_w(Register dst, Operand src) {
   emit_operand(dst, src);
 }
 
+/*#if defined(FORCE_USE_SSE2)*/
 void Assembler::movq(XMMRegister dst, Operand src) {
   EnsureSpace ensure_space(this);
   EMIT(0xF3);
@@ -700,6 +703,7 @@ void Assembler::movq(Operand dst, XMMRegister src) {
   emit_operand(src, dst);
 }
 
+#if defined(FORCE_USE_SSE2)
 void Assembler::cmov(Condition cc, Register dst, Operand src) {
   EnsureSpace ensure_space(this);
   // Opcode: 0f 40 + cc /r.
@@ -707,6 +711,7 @@ void Assembler::cmov(Condition cc, Register dst, Operand src) {
   EMIT(0x40 + cc);
   emit_operand(dst, src);
 }
+#endif
 
 void Assembler::cld() {
   EnsureSpace ensure_space(this);
@@ -2202,6 +2207,8 @@ void Assembler::cvttsd2si(Register dst, Operand src) {
   emit_operand(dst, src);
 }
 
+#if defined(FORCE_USE_SSE2)
+// not used
 void Assembler::cvtsd2si(Register dst, XMMRegister src) {
   EnsureSpace ensure_space(this);
   EMIT(0xF2);
@@ -2209,6 +2216,7 @@ void Assembler::cvtsd2si(Register dst, XMMRegister src) {
   EMIT(0x2D);
   emit_sse_operand(dst, src);
 }
+#endif
 
 void Assembler::cvtsi2ss(XMMRegister dst, Operand src) {
   EnsureSpace ensure_space(this);
diff --git a/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.h b/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.h
index 8f0d9ddbf..d04a7d100 100644
--- a/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.h
+++ b/src/3rdparty/chromium/v8/src/codegen/ia32/assembler-ia32.h
@@ -543,11 +543,13 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
   void movq(XMMRegister dst, Operand src);
   void movq(Operand dst, XMMRegister src);
 
+#if defined(FORCE_USE_SSE2)
   // Conditional moves
   void cmov(Condition cc, Register dst, Register src) {
     cmov(cc, dst, Operand(src));
   }
   void cmov(Condition cc, Register dst, Operand src);
+#endif
 
   // Flag management.
   void cld();
diff --git a/src/3rdparty/chromium/v8/src/compiler/backend/ia32/code-generator-ia32.cc b/src/3rdparty/chromium/v8/src/compiler/backend/ia32/code-generator-ia32.cc
index c9d63f03d..3d74f48a5 100644
--- a/src/3rdparty/chromium/v8/src/compiler/backend/ia32/code-generator-ia32.cc
+++ b/src/3rdparty/chromium/v8/src/compiler/backend/ia32/code-generator-ia32.cc
@@ -495,7 +495,11 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
     __ Pxor(tmp_simd, tmp_simd);                     \
     __ opcode(tmp_simd, src);                        \
     __ Ptest(tmp_simd, tmp_simd);                    \
-    __ cmov(zero, dst, tmp);                         \
+    /*__ cmov(zero, dst, tmp);*/                         \
+    Label nonzero;                                   \
+    __ j(not_zero, &nonzero, Label::kNear);          \
+    __ mov(dst, tmp);                                \
+    __ bind(&nonzero);                               \
   } while (false)
 
 #define ASSEMBLE_SIMD_SHIFT(opcode, width)                \
@@ -3440,7 +3444,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ xor_(tmp, tmp);
       __ mov(dst, Immediate(1));
       __ Ptest(src, src);
-      __ cmov(zero, dst, tmp);
+      //__ cmov(zero, dst, tmp);
+      Label nonzero;
+      __ j(not_zero, &nonzero, Label::kNear);
+      __ mov(dst, tmp);
+      __ bind(&nonzero);
       break;
     }
     // Need to split up all the different lane structures because the
@@ -3495,9 +3503,19 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     }
     case kIA32Word32AtomicPairLoad: {
-      __ movq(kScratchDoubleReg, i.MemoryOperand());
-      __ Pextrd(i.OutputRegister(0), kScratchDoubleReg, 0);
-      __ Pextrd(i.OutputRegister(1), kScratchDoubleReg, 1);
+      //__ movq(kScratchDoubleReg, i.MemoryOperand());
+      //__ Pextrd(i.OutputRegister(0), kScratchDoubleReg, 0);
+      //__ Pextrd(i.OutputRegister(1), kScratchDoubleReg, 1);
+      //XXX This is not atomic.
+      //__ mov(i.OutputRegister(0), i.MemoryOperand());
+      //__ mov(i.OutputRegister(1), i.NextMemoryOperand());
+
+      __ AllocateStackSpace(kDoubleSize);
+      __ fild_d(i.MemoryOperand());
+      __ fistp_d(MemOperand(esp, 0));
+      __ mov(i.OutputRegister(0), MemOperand(esp, 0));
+      __ mov(i.OutputRegister(1), MemOperand(esp, 4));
+      __ add(esp, Immediate(kDoubleSize));
       break;
     }
     case kIA32Word32ReleasePairStore: {
diff --git a/src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h b/src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h
index 2bd5713aa..98f5e9d83 100644
--- a/src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h
+++ b/src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h
@@ -2506,7 +2506,12 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
       pop(dst.high_gp());
       return true;
     case kExprF32SConvertI32:
-      cvtsi2ss(dst.fp(), src.gp());
+      //cvtsi2ss(dst.fp(), src.gp());
+      AllocateStackSpace(4);
+      mov(Operand(esp,0), src.gp());
+      fild_s(Operand(esp,0)); 
+      fstp_s(Operand(esp,0));
+      Movd(dst.fp(),Operand(esp,0));
       return true;
     case kExprF32UConvertI32: {
       LiftoffRegList pinned{dst, src};
@@ -2842,7 +2847,11 @@ inline void EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst,
   assm->xor_(tmp, tmp);
   assm->mov(dst.gp(), Immediate(1));
   assm->Ptest(src.fp(), src.fp());
-  assm->cmov(zero, dst.gp(), tmp);
+  //assm->cmov(zero, dst.gp(), tmp);
+  Label nonzero;
+  assm->j(not_zero, &nonzero, Label::kNear);
+  assm->mov(dst.gp(), tmp);
+  assm->bind(&nonzero);
 }
 
 template <void (SharedMacroAssemblerBase::*pcmp)(XMMRegister, XMMRegister)>
@@ -2859,7 +2868,11 @@ inline void EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst,
   assm->Pxor(tmp_simd, tmp_simd);
   (assm->*pcmp)(tmp_simd, src.fp());
   assm->Ptest(tmp_simd, tmp_simd);
-  assm->cmov(zero, dst.gp(), tmp);
+  //assm->cmov(zero, dst.gp(), tmp);
+  Label nonzero;
+  assm->j(not_zero, &nonzero, Label::kNear);
+  assm->mov(dst.gp(), tmp);
+  assm->bind(&nonzero);
 }
 
 }  // namespace liftoff