x86/32: Fix booting on Cyrix MII pausing after TSC calibration

Disable PARANOID_EXIT_TO_KERNEL_MODE if X86_FEATURE_PTI_SUPPORT is not set.

Without this, Cyrix MII fails to boot, pausing on
Fast TSC calibration using PIT
and emitting BUGs afterwhile.
For unknown reason plain Pentium and AMD K6-2 boots without this patch.

...
Checking if this processor honours the WP bit even in supervisor mode...Ok.
Hierarchical RCU implementation.
NR_IRQS:2304 nr_irqs:256
Console: colour VGA+ 80x25
console [ttyS0] enabled
Fast TSC calibration using PIT
<Pauses here>
BUG: unable to handle kernel paging request at dfff0000
IP: [<c086f56a>] restore_all_kernel+0x2f/0x55
*pde = 00082067 *pte = 00000000
Oops: 0002 [#1] SMP
last sysfs file:
Modules linked in:

Pid: 0, comm: swapper Not tainted 2.6.32-754.3.5.el6.emu686.v40.i586 #1 System Manufacturer System Name/ALADDIN5
EIP: 0060:[<c086f56a>] EFLAGS: 00010093 CPU: 0
EIP is at restore_all_kernel+0x2f/0x55
EAX: 00000000 EBX: c1d9c7c8 ECX: e1417470 EDX: c0b72da0
ESI: df65ab90 EDI: dfff0000 EBP: c1406000 ESP: c1407358
 DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
Process swapper (pid: 0, ti=c1406000 task=c0a7bc60 task.ti=c0a70000)
Stack:
 00000000 c0a89c94 00000000 00bb8000 00000000 001234de 00000246 0000007b
<0> 00bb007b 000000d8 001200e0 ffffffcf c043a782 41400060 00000246 c040b6fe
<0> c09c4bd4 00000000 00000000 00000000 5cb5cd76 00000203 f476fd74 00000003
Call Trace:
 [<c043a782>] ? native_restore_fl+0x2/0x10
 [<c040b6fe>] ? native_calibrate_tsc+0x16e/0x6d0
 [<c08600e0>] ? mmio_resource_enabled.clone.0+0x2f/0x39
 [<c0af03f3>] ? tsc_init+0x6f/0x157
 [<c086f0cd>] ? _spin_unlock_irqrestore+0xd/0x10
 [<c0ae8ae9>] ? start_kernel+0x244/0x2e9
 [<c0ae8753>] ? unknown_bootoption+0x0/0x120
 <IRQ>
...

diff -U6 -p ./arch/x86/kernel/entry_32.S.cyrix ./arch/x86/kernel/entry_32.S
--- ./arch/x86/kernel/entry_32.S.cyrix	2018-04-26 15:48:50.000000000 +0900
+++ ./arch/x86/kernel/entry_32.S	2018-09-24 14:53:57.000000000 +0900
@@ -444,12 +444,15 @@
 
 	/* Unlikely slow-path */
 
 	/* Clear marker from stack-frame */
 	andl	$(~CS_FROM_ENTRY_STACK), PT_CS(%esp)
 
+	/* need this on Cyrix MII */
+	ALTERNATIVE     "jmp .Lend_\@", "", X86_FEATURE_PTI_SUPPORT
+
 	/* Copy the remaining task-stack contents to entry-stack */
 	movl	%esp, %esi
 	PER_CPU(init_tss + TSS_stack + TSS_stack_size, %edi)
 
 	/* Bytes on the task-stack to ecx */
 	movl	PER_CPU_VAR(init_tss + TSS_kernel_stack), %ecx